CC203  T1 Desynch

The CC203 DS1 Desynchronizer takes in byte-wide gapped DS1 frame data from a Virtual Tributary (VT1.5) demapper and provides a smooth serial DS1 data and clock. The byte-wide DS1 data from the demapper may have 0, 1, 2 or 8 bits valid. The DS1 Desynchronizer attenuates the jitter by spreading out the effect of incoming pointer movements in a single direction over a longer period of time; it also removes the jitter due to pointer movements in opposite directions. It then removes the jitter due to overhead gapping during mapping and attenuates the jitter due to bit stuffing.

Features

  • Conforms to standards GR253Core, GR499Core, and ITU-T G.783
  • Interfaces to a VT demapper, takes in byte-wide demapped data and provides serial DS1 data
  • Generates DS1 clock using a stable reference clock
  • Attenuates jitter associated with mapping, pointer movements and bit stuffing
  • Sends out '1's on T1 line during VT or Path defect
  • Indicates FIFO error conditions when the source jitter or ppm exceeds the tolerance level


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