CC332 Combined T1/E1/DS2 Mapper for TC Applications
The CC332 core performs asynchronous mapping/demapping (add/drop) of single 1.544 Mbit/s T1 signal to and from the Virtual Tributary (VT1.5) or Tributary Unit-11 (TU-11) structures, single 2.048 Mbits/s E1 signal to and from the Virtual Tributary VT2 or Tributary Unit-12 (TU-12), and single T2 signal to and from Virtual Tributary VT6 or Tributary Unit-2 (TU-2). It interfaces to a byte-parallel SONET/SDH-formatted Telecom Bus at a byte rate of 19.44 MHz for STM-1 operation or at a byte rate of 6.48 MHz for STS-1/STM-0 operation. It performs full low order path termination and origination functions for a single tributary (VT1.5/VT2/VT6/TU-11/TU-12/TU-2). The CC332 meets the industry standards ITU-T G.707, G.783, BellCore GR-253-CORE (Issue 2), GR-499-CORE, and GR-1244-CORE.
Features
- Supports asynchronous Map/De-map of single T1/E1/T2 signal from VT/TU: STS-1/STM-0 AU-3, STM-1 AU-3 and STM-1 AU-4 VC-4
- Independent Add and Drop bus timings
- Generic 16-bit controller interface
- Conforms to ITU G.707, G.783, BellCore GR-253-CORE (Issue 2), GR-499-CORE, and GR-1244-CORE
- Configurable VT1.5/VT2/VT6/TU-11/TU-12/TU-2 slot selection for T1/E1/T2 drop
- Optionally processes H4 byte to detect VT/TU phase and generates H4 multiframe error
- Configurable VT1.5/VT2/VT6/TU-11/TU-12/TU-2 slot selection for T1/E1/T2 insertion
- Performs bit stuffing for rate matching of T1/E1/T2 signal. The stuffing algorithm deployed reduces demapping jitter and wander
- Provides PMON counters for BIP errors, REI, and pointer justifications received
- Generates VT path errored second (ES-V) and VT path severely errored second (SES-V)
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